FIFO interrupt enable clear (disable) and read register.
| TXERR | Writing one clears the corresponding bits in the FIFOINTENSET register. |
| RXERR | Writing one clears the corresponding bits in the FIFOINTENSET register. |
| TXLVL | Writing one clears the corresponding bits in the FIFOINTENSET register. |
| RXLVL | Writing one clears the corresponding bits in the FIFOINTENSET register. |